Profichip

Application Specific Integrated Circuits

Descrição

Integre a comunicação PROFIBUS em seus produtos.

VPC3+S / PALF2009 - PALF2012

PROFIBUS-DP-V1/-V2 Slave Controller with serial Interface

- SPI, IIC, parallel-Interface
- LQFP 48pin (new) or BGA 48pin Package 
- 4kByte communication RAM
- Function and software compatible to VPC3+C and SPC3 from Siemens
- Supporting PROFIBUS-DP-V0, DP-V1 and DP-V2 protocol
- HW - PLL für DP-V2 - ISOM
- Ultra Low Power, Vcc 3.3V
- Software stack and Evaluation-Kit

VPC3+CLF3 / PALF2080

PROFIBUS DP-V1/-V2 Slave Controller

- PROFIBUS-DP/DP-V1 / DP-V2 protocol handling in hardware
- 100% compatible to SPC3
- 4 KByte communication-RAM
- 3.3V or 5V power supply
- Low current consumption
- PNO certified costumer applications
- Package PQFP44
- Software stack and Evaluation Kit available

VPCLS2

PROFIBUS DP Lean Slave Controller

- PROFIBUS-DP protocol handling in hardware
- 40 Bit I/O, 1 up to 3 Byte configurable
- as diagnostic inputs
- 5V power supply
- Maximum data transfer rate 12 Mbit/s
- Package PQFP80
- Asynchronous interface according to PROFIBUS-DP
- Automatic recognition of data transfer rate
- Evaluation Kit available

MPI12x / PALF2060

MPI Controller / PROFIBUS-DP Slave

- MPI communication up to 12Mbits/s
- PROFIBUS-DP Slave incl. Clock Synchronisation
- 4KByte integrated SRAM
- Configurable 8 Bit µController interface
- 3.3V power supply, 5V tolerant inputs
- Package PQFP44
- Software stack and Evaluation-Kit available

SMC1000 SliceBus Master Controller


- ARM926 core
- PROFIBUS Slave interface
- Ethernet (10/100) MACs
- UARTs, CAN, SPI, I2C interfaces
- USB 1.1 with PHY
- 8/16bit asynchronos SRAM interface
- 8bit Flash controller
- MMC/SD Card controller
- 16bit DDR2 controller
- 608kB internal SRAM

SNAP+ - I/O Backplane Controller for high speed Remote I/O

Basic SliceBus backplane information:

- Single master system
- Up to 64 slave (Node) stations
- Asynchronous, serial data transmission with 48 MBit/s over Point to Point LVDS physic
- Additional alarm line for initialization and asynchronous event communications from node to master
- Full system detection from SliceBus master without external information on module configuration

Application Specific Integrated Circuits

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